U.S. Pat. No. 4,295,209 discloses late programming an IGFET ROM by ion implantation through openings in an overlying phosphosilicate glass layer immediately before metallization. The ion implantation is done through a polycrystalline silicon gate electrode of selected IGFETs in the ROM. Small size in the ROM is preserved in U.S. Pat. No. 4,295,209 by incorporating a silicon nitride coating immediately beneath the phosphosilicate glass layer. Consequently, when implant openings are etched in the phosphosilicate glass layer, the polycrystalline silicon gate electrode is not exposed. Accordingly, metal lines can cross directly over the implant openings without contacting the gate electrodes. However, the silicon nitride coating is ordinarily thin and there can be a capacitive coupling which occurs between the drain lines and the polysilicon gate within the implant windows. In larger size ROMs this capacitive coupling can become significant enough to slow down the speed of the ROM.
In our above-mentioned concurrently filed Ser. No. 268,086, we disclose a different late programming process by which high operating speed can be retained with ROMs of the usual construction. We have now found a technique by which ion implantation can be used in substantially the same way as outlined in the aforementioned U.S. Pat. No. 4,295,209 but without a penalty of slower operating speed or expanded size in larger ROMs. We have discovered that the U.S. Pat. No. 4,295,209 late programming method is effective on a high density ROM of unique configuration. The unique configuration was previously known and is referred to as a hexagonal ROM. This unique configuration does not require metal lines to cross implant windows in the reflowable glass layer. Thus, capacitive coupling is minimized. Accordingly, both highest speed and maximum ROM density is retained.